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TNETV1647GSTZWT 데이터시트(PDF) 185 Page - Texas Instruments

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부품명 TNETV1647GSTZWT
상세설명  Digital Media System-on-Chip
PDF  236 Pages
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TMS320DM6441
www.ti.com
SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010
6.14
USB 2.0
The DM6441 USB2.0 peripheral supports the following features:
•
USB 2.0 peripheral at speeds high speed (HS: 480 Mb/s) and full speed (FS: 12 Mb/s)
•
USB 2.0 host at speeds HS, FS, and low speed (LS: 1.5 Mb/s)
•
All transfer modes (control, bulk, interrupt, and isochronous)
•
Four transmit (TX) and four receive (RX) endpoints in addition to endpoint 0
•
FIFO RAM
–
4K endpoint
–
Programmable size
•
Connects to a standard charge pump for VBUS 5 V generation
•
RNDIS mode for accelerating RNDIS type protocols using short packet termination over USB
6.14.1 USBPHY_CTL Register Description
The USB physical interface control register USBPHY_CTL is described in Figure 6-55 and Table 6-66.
Figure 6-55. USBPHY_CTL Register
31
9
8
RESERVED
PHYCLKGD
R-0000 0000 0000 0000 0000 000
R-0
7
6
5
4
3
2
1
0
SESNDEN
VBDTCTEN
RSV
PHYPLLON
CLKO1SEL
OSCPDWN
RSV
PHYPDWN
R/W-1
R/W-1
R-0
R/W-0
R/W-0
R/W-1
R/W-1
R/W-1
LEGEND: R = Read, W = Write, n = value at reset
Table 6-66. USBPHY_CTL Register Field Descriptions
Bit
Field
Value
Description
31 - 9
RESERVED
Reserved
8
PHYCLKGD
USB PHY Power and Clock Good
0
PHY power not ramped or PLL not locked
1
PHY power is good and PLL is locked
7
SESNDEN
Session End Comparator enable
0
Comparator disabled
1
Comparator enabled
6
VBDTCTEN
vbus comparator enable
0
Comparators (except session end) disabled
1
Comparators (except session end) enabled
5
RESERVED
Reserved
4
PHYPLLON
USB PHY PLL suspend override
0
Normal PLL operation
1
Override PLL suspend state
3
CLKO1SEL
CLK_OUT1 frequency select
0
24 MHz
1
12 MHz
2
OSCPDWN
USB PHY oscillator power down control
0
PHY oscillator powered
1
PHY oscillator power off
1
RESERVED
Reserved
Copyright © 2006–2010, Texas Instruments Incorporated
Peripheral and Electrical Specifications
185
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Product Folder Link(s): TMS320DM6441



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