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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TNETV1644ZDU6 데이터시트(PDF) 244 Page - Texas Instruments |
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TNETV1644ZDU6 데이터시트(HTML) 244 Page - Texas Instruments |
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244 / 306 page  HCS HAS(D) HCNTL[1:0] HR/W HHWIL HSTROBE(A)(C) HD[15:0] (output) HRDY(B) 1 2 1 2 1 2 5 6 3 4 3 1 2 1 2 1 2 8 14 15 14 8 7 1st Half-Word 2nd Half-Word 6 13 15 A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing)and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on the HPI peripheral, see the TMS320DM643x Host Port Interface (HPI) User’s Guide (literature number SPRU998). C. HCS reflects typical HCS behavior when HSTROBE assertion is caused by HDS1 or HDS2. HCS timing requirements are reflected by parameters for HSTROBE. D For proper HPI operation, HAS must be pulled up via an external resistor. TMS320DM6437 Digital Media Processor SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Figure 6-32. HPI16 Read Timing (HAS Not Used, Tied High) 244 Peripheral Information and Electrical Specifications Submit Documentation Feedback |
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