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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TNETV6446AINZWT 데이터시트(PDF) 174 Page - Texas Instruments |
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TNETV6446AINZWT 데이터시트(HTML) 174 Page - Texas Instruments |
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174 / 227 page  1 PCLK 2 3 7 5 6 4 8 VPBECLK 4 8 TMS320DM6446 SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 www.ti.com Table 6-59. VENC (Including Digital LCD and DACs) Register Descriptions (continued) ADDRESS REGISTER DESCRIPTION 0x01C7 2534 HVLDCL0 Horizontal Valid Culling Control 0 0x01C7 2538 HVLDCL1 Horizontal Valid Culling Control 1 0x01C7 253C OSDHADV OSD Horizontal Sync Advance 6.13.2.3 VPBE Electrical Data/Timing Table 6-60. Timing Requirements for VPBE CLK Inputs (see Figure 6-50) A-513, -594, NO. UNIT -810 MIN MAX 1 tc(PCLK) Cycle time, PCLK 13.33 160 ns 2 tw(PCLKH) Pulse duration, PCLK high 5.7 ns 3 tw(PCLKL) Pulse duration, PCLK low 5.7 ns 4 tt(PCLK) Transition time, PCLK 3 ns 5 tc(VPBECLK) Cycle time, VPBECLK 13.33 160 ns 6 tw(VPBECLKH) Pulse duration, VPBECLK high 5.7 ns 7 tw(VPBECLKL) Pulse duration, VPBECLK low 5.7 ns 8 tt(VPBECLK) Transition time, VPBECLK 3 ns Figure 6-50. VPBE PCLK and VPBECLK Timing 174 Peripheral and Electrical Specifications Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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