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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TNETV6446AINZWT 데이터시트(PDF) 212 Page - Texas Instruments |
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TNETV6446AINZWT 데이터시트(HTML) 212 Page - Texas Instruments |
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212 / 227 page  1 4 5 MDCLK MDIO (input) 3 3 1 7 MDCLK MDIO (output) TMS320DM6446 SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 www.ti.com 6.21.2 Management Data Input/Output (MDIO) Electrical Data/Timing Table 6-99. Timing Requirements for MDIO Input (see Figure 6-72 and Figure 6-73) A-513, -594, NO. UNIT -810 MIN MAX 1 tc(MDCLK) Cycle time, MDCLK 400 ns 2 tw(MDCLK) Pulse duration, MDCLK high/low 180 ns 3 tt(MDCLK) Transition time, MDCLK 5 ns 4 tsu(MDIO-MDCLKH) Setup time, MDIO data input valid before MDCLK high 15 ns 5 th(MDCLKH-MDIO) Hold time, MDIO data input valid after MDCLK high 0 ns Figure 6-72. MDIO Input Timing Table 6-100. Switching Characteristics Over Recommended Operating Conditions for MDIO Output (see Figure 6-73) A-513, -594, NO. UNIT -810 MIN MAX 7 td(MDCLKL-MDIO) Delay time, MDCLK low to MDIO data output valid -0.6 100 ns Figure 6-73. MDIO Output Timing 212 Peripheral and Electrical Specifications Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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