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TNETV6446AINZWT 데이터시트(PDF) 222 Page - Texas Instruments

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부품명 TNETV6446AINZWT
상세설명  Digital Media System-on-Chip
PDF  227 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV6446AINZWT 데이터시트(HTML) 222 Page - Texas Instruments

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TCK
TDO
TDI/TMS
1
7
2
3
RTCK
4
5
6
9
8
TMS320DM6446
SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010
www.ti.com
Table 6-114. JTAG ID Register Selection Bit Descriptions
BIT
NAME
DESCRIPTION
Variant (4-Bit) value. DM6446 value: 0000 for silicon revisions 1.3 and earlier, and 0001 for
31:28
VARIANT
silicon revisions 2.1 and later.
27:12
PART NUMBER
Part Number (16-Bit) value. DM6446 value: 1011 0111 0000 0000.
11-1
MANUFACTURER
Manufacturer (11-Bit) value. DM6446 value: 0000 0010 111.
0
LSB
LSB. This bit is read as a "1" for DM6446.
6.25.2
JTAG Test-Port Electrical Data/Timing
Table 6-115. Timing Requirements for JTAG Test Port (see Figure 6-80)
A-513,
-594,
NO.
UNIT
-810
MIN
MAX
1
tc(TCK)
Cycle time, TCK
20
ns
2
tw(TCKH)
Pulse duration, TCK high
8
ns
3
tw(TCKL)
Pulse duration, TCK low
8
ns
4
tc(RTCK)
Cycle time, RTCK
20
ns
5
tw(RTCKH)
Pulse duration, RTCK high
10
ns
6
tw(RTCKL)
Pulse duration, RTCK low
10
ns
7
tsu(TDIV-RTCKH)
Setup time, TDI/TMS valid before RTCK high
10
ns
8
th(RTCKH-TDIV)
Hold time, TDI/TMS valid after RTCK high
1
ns
Table 6-116. Switching Characteristics Over Recommended Operating Conditions for JTAG Test Port
(see Figure 6-80)
A-513,
-594,
NO.
PARAMETER
UNIT
-810
MIN
MAX
9
td(RTCKL-TDOV)
Delay time, RTCK low to TDO valid
15
ns
Figure 6-80. JTAG Test-Port Timing
222
Peripheral and Electrical Specifications
Copyright © 2005–2010, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320DM6446



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