TMS320VC5421 datasheet(29/104 Pages) TI1

29 / 104 page

Functional Overview

December 1999 − Revised October 2008

SPRS098D

3.1.2 On-Chip Single-Access RAM (SARAM)

The 5421 subsystems A and B each have 32K 16-bit words of on-chip SARAM (4 blocks of 8K words). Each

of these SARAM blocks can be accessed once per machine cycle. This memory is intended to store data

values only. At reset, the SARAM is disabled. The SARAM can be enabled in data memory space by setting

the DROM bit in the PMST register.

3.1.3 On-Chip Two-Way Shared RAM (DARAM)

The 5421 has 128K 16-bit words of on-chip DARAM (16 blocks of 8K words) that is shared between the two

DSP subsystems. This memory is intended to store program only. Each subsystem is able to make one

instruction fetch from any location in two-way shared memory each cycle. Neither subsystem CPU can write

to the two-way shared memory as only the DMA can write to two-way shared memory.

3.1.4 On-Chip Boot ROM

The 5421 subsystems A and B each have 2K 16-bit words of on-chip ROM. This ROM is used for bootloading

functions only. Enabling the ROM maps out one 8K-word block of the shared program memory. The ROM can

be disabled by clearing bit 7 (ROMEN) of the general-purpose I/O (GPIO) register. Table 3−1 shows the

XIO/ROMEN modes. The ROM is enabled or disabled at reset for each subsystem depending on the state

of the GPIO0 pin for that subsystem.

Table 3−1. XIO/ROMEN Modes

XIO

ROMEN/GPIO0

MODE

Fetch internal from RAM

Fetch external

ROM enabled

3.1.5 Extended Program Memory

The program memory space on the 5421 device addresses up to 512K 16-bit words. The 5421 device uses

a paged extended memory scheme in program space to allow access of up to 512K of program memory . This

extended program memory (each subsystem) is organized into eight pages (0−7), pages 0−3 are internal,

pages 4−7 are external, each 64K in length. (Pages 8−127 as defined by the program counter extension

implement the extended program memory scheme, the 5421 device includes the following feature:

•

Two 54x instructions are extended to use the additional two bits in the 5421 device.

−

READA − Read program memory addressed by accumulator A and store in data memory

−

WRITA − Write data to program memory addressed by accumulator A

(Writes not allowed for CPUs to shared program memory)

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