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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L7987 데이터시트(PDF) 26 Page - STMicroelectronics |
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L7987 데이터시트(HTML) 26 Page - STMicroelectronics |
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26 / 37 page  Application information L7987 26/37 DocID025589 Rev 3 After choosing the regulator bandwidth (typically FBW < 0.2 • FSW) and a value for RU, usually between 1 k and 50 k, in order to achieve CF and CP not comparable with parasitic capacitance of the board, the RF required value is computed by Equation 22. Select CF in order to place FZ1 below FLC (typically 0.1 • FLC) Select CP in order to place FP1 at 0.5 • FSW Equation 23 The resultant control loop and other transfer functions gain are shown in Figure 12. Figure 12. Type II compensation - bode plot 5.4.2 Type III compensation network If FzESR is higher than the target loop bandwidth, as usually happens if the output filter is based on MLCC ceramic capacitors, a type III compensation network must be designed. CF 1 2 R F 0.1 fLC ------------------------------------------------ CP ; 1 2 R F 0.5 fSW ------------------------------------------------- == |
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