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L6718TR 데이터시트(PDF) 18 Page - STMicroelectronics

부품명 L6718TR
상세설명  SMBus interface for power management
PDF  71 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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L6718TR 데이터시트(HTML) 18 Page - STMicroelectronics

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Pin description and connection diagrams
L6718
18/71
DocID023399 Rev 3
52
VREADY
Multi-phase rail VREADY
Open drain output set free after SS has finished and pulled low when
triggering any protection on multi-phase rail. Pull up to a voltage lower
than 3.3 V (typ.), if not used it can be left floating
53
CS4N
Channel 4 current sense negative input.
Connect through an RG resistor to the output-side of channel 4 inductor.
Filter the output-side of RG with 100 nF (typ.) to GND.
Connect to VOUT through an RG resistor when not using channel 4.
See Section 14 for proper layout of this connection.
54
CS4P
Channel 4 current sense positive input.
Connect through an R-C filter to the phase-side of channel 3 inductor.
Short to VOUT when not using channel 4.
See Section 14 for proper layout of this connection.
55
CS2P
Channel 2 current sense positive input.
Connect through an R-C filter to the phase-side of channel 2 inductor.
See Section 14 for proper layout of this connection.
56
CS2N
Channel 2 current sense negative input.
Connect through an RG resistor to the output-side of channel 2 inductor.
Filter the output-side of RG with 100 nF (typ.) to GND.
See Section 14 for proper layout of this connection.
PAD
GND
GND connection.
Exposed pad connects also the silicon substrate. It makes a good thermal
contact with the PCB to dissipate the internal power. All internal
references and logic are referenced to this pin.
Connect to power GND plane using 5.3 x 5.3 mm square area on the PCB
and with 9 vias (uniformly distributed) to improve electrical and thermal
conductivity.
Table 2. Pin description (continued)
Pin#
Name
Function



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