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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST7DALIF2 데이터시트(PDF) 154 Page - STMicroelectronics |
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ST7DALIF2 데이터시트(HTML) 154 Page - STMicroelectronics |
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154 / 171 page  Electrical characteristics ST7DALIF2 154/171 20.11 10-bit ADC characteristics Subject to general operating condition for VDD, fOSC, and TA unless otherwise specified. Figure 92. Typical Application with ADC Table 89. ADC characteristics Symbol Parameter Conditions Min Typ (1) 1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guidelines and are not tested. Max Unit fADC ADC clock frequency 4 MHz VAIN Conversion voltage range (2) 2. When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS. VSSA VDDA V RAIN External input resistor 10 (3) 3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k Ω). Data based on characterization results, not tested in production. k Ω CADC Internal sample and hold capacitor 6pF tSTAB Stabilization time after ADC enable fCPU=8MHz, fADC=4MHz 0 (4) 4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then always valid. μs tADC Conversion time (Sample+Hold) 3.5 - Sample capacitor loading time - Hold conversion time 4 10 1/fADC IADC Analog Part 1 mA Digital Part 0.2 AINx ST72XXX VDD IL ±1 μA VT 0.6V VT 0.6V CADC 6pF VAIN RAIN 10-Bit A/D Conversion CAIN |
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