전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

ST7MC1K2 데이터시트(PDF) 157 Page - STMicroelectronics

부품명 ST7MC1K2
상세설명  Clock, reset and supply management
PDF  371 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7MC1K2 데이터시트(HTML) 157 Page - STMicroelectronics

Back Button ST7MC1K2 Datasheet HTML 153Page - STMicroelectronics ST7MC1K2 Datasheet HTML 154Page - STMicroelectronics ST7MC1K2 Datasheet HTML 155Page - STMicroelectronics ST7MC1K2 Datasheet HTML 156Page - STMicroelectronics ST7MC1K2 Datasheet HTML 157Page - STMicroelectronics ST7MC1K2 Datasheet HTML 158Page - STMicroelectronics ST7MC1K2 Datasheet HTML 159Page - STMicroelectronics ST7MC1K2 Datasheet HTML 160Page - STMicroelectronics ST7MC1K2 Datasheet HTML 161Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 157 / 371 page
background image
Obsolete
Product(s)
- Obsolete
Product(s)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
On-chip peripherals
157/371
SCI extended receive prescaler division register (SCIERPR)
Table 65.
SCIBRR register description
Bit
Name
Function
7:6 SCP[1:0]
First SCI prescaler
These 2 prescaling bits allow several standard clock division ranges:
00: PR prescaling factor = 1
01: PR prescaling factor = 3
10: PR prescaling factor = 4
11: PR prescaling factor = 13
5:3 SCT[2:0]
SCI transmitter rate divisor
These 3 bits, in conjunction with the SCP1 and SCP0 bits define the total division
applied to the bus clock to yield the transmit rate clock in conventional baud rate
generator mode:
000: TR dividing factor = 1
001: TR dividing factor = 2
010: TR dividing factor = 4
011: TR dividing factor = 8
100: TR dividing factor = 16
101: TR dividing factor = 32
110: TR dividing factor = 64
111: TR dividing factor = 128
2:0 SCR[2:0]
SCI receiver rate divider
These 3 bits, in conjunction with the SCP[1:0] bits define the total division applied
to the bus clock to yield the receive rate clock in conventional baud rate generator
mode:
000: RR dividing factor = 1
001: RR dividing factor = 2
010: RR dividing factor = 4
011: RR dividing factor = 8
100: RR dividing factor = 16
101: RR dividing factor = 32
110: RR dividing factor = 64
111: RR dividing factor = 128
SCIERPR
Reset value: 0000 0000 (00h)
7
654
32
10
ERPR[7:0]
R/W
Table 66.
SCIERPR register description
Bit
Name
Function
7:0 ERPR[7:0]
8-bit extended receive prescaler register
The extended baud rate generator is activated when a value other than 00h is
stored in this register. The clock frequency from the 16 divider (see Figure 63) is
divided by the binary factor set in the SCIERPR register (in the range 1 to 255).
The extended baud rate generator is not active after a reset.
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com