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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST7MC1K2 데이터시트(PDF) 264 Page - STMicroelectronics |
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ST7MC1K2 데이터시트(HTML) 264 Page - STMicroelectronics |
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264 / 371 page  Obsolete Product(s) - Obsolete Product(s) On-chip peripherals ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto 264/371 Interrupt status register (MISR) MISR Reset value: 0000 0000 (00h) 7 654 32 10 PUI RPI RMI CLI EI ZI DI CI R/W R/W R/W R/W R/W R/W R/W R/W Table 125. MISR register description Bit Name Function 7 PUI PWM update interrupt flag This bit is set by hardware when all the PWM compare register are transferred from the preload to the active registers. The corresponding interrupt allows the user to refresh the preload registers before the next PWM update event defined with MREP register. 0: No PWM update interrupt pending 1: PWM update interrupt pending 6RPI Ratio increment interrupt flag Autoswitched mode (Swa bit = 1) 0: No R+ interrupt pending 1: R+ interrupt pending Switched mode (Swa bit = 0) 0: No R+ action 1: The hardware increments the ST[3:0] bits when the next commutation occurs and shifts all timer registers right. Speed sensor mode (SWA bit = x, TES[1:0] bits = 01, 10, 11) 0: No R+ interrupt pending 1: R+ Interrupt pending 5RMI Ratio decrement interrupt flag Autoswitched mode (SWA bit = 1) 0: No R- interrupt pending 1: R- Interrupt pending Switched mode (SWA bit = 0) 0: No R- action 1: The hardware decrements the ST[3:0] bits when the next commutation occurs and shifts all timer registers left Speed sensor mode (SWA bit = x, TES[1:0] bits = 01, 10, 11) 0: No R- interrupt pending 1: R- Interrupt pending 4CLI Current limitation interrupt flag 0: No current limitation interrupt pending 1: Current limitation interrupt pending 3EI Emergency stop interrupt flag 0: No emergency stop interrupt pending 1: Emergency stop interrupt pending 2ZI BEMF zero-crossing interrupt flag 0: No BEMF zero-crossing interrupt pending 1: BEMF zero-crossing interrupt pending Obsolete Product(s) - Obsolete Product(s) |
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