ST7MC1K2 datasheet(304/371 Pages) STMICROELECTRONICS

304 / 371 page

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Instruction set

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

304/371

11.1.1

Inherent

All inherent instructions consist of a single byte. The opcode fully specifies all the required information for

the CPU to process the operation.

Relative

Indirect

jrne [$10]

PC+/-127

00..FF

byte

+ 2

Bit

Direct

bset $10,#7

00..FF

+ 1

Bit

Indirect

bset [$10],#7

00..FF

byte

+ 2

Bit

Direct

Relative btjt $10,#7,skip

00..FF

+ 2

Bit

Indirect Relative btjt [$10],#7,skip 00..FF

00..FF

byte

+ 3

Table 179.

Inherent instructions

Inherent instruction

Function

NOP

No operation

TRAP

S/W interrupt

WFI

Wait for interrupt (low power mode)

HALT

Halt oscillator (lowest power mode)

RET

Sub-routine return

IRET

Interrupt sub-routine return

SIM

Set interrupt mask (level 3)

RIM

Reset interrupt mask (level 0)

SCF

Set carry flag

RCF

Reset carry flag

RSP

Reset stack pointer

Load

CLR

Clear

Push/pop

Push/pop to/from the stack

INC/DEC

Increment/decrement

TNZ

Test negative or zero

CPL, NEG

1 or 2 complement

MUL

Byte multiplication

SLL, SRL, SRA, RLC, RRC

Shift and rotate operations

SWAP

Swap nibbles

Table 178.

CPU addressing mode overview (continued)

Mode

Syntax

Destination

Pointer address

(Hex.)

Pointer size

(Hex.)

Length

(bytes)

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