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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72344S4 데이터시트(PDF) 35 Page - STMicroelectronics |
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ST72344S4 데이터시트(HTML) 35 Page - STMicroelectronics |
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35 / 247 page  ST72344xx, ST2345xx Data EEPROM Doc ID 12321 Rev 6 35/247 5.7 Register description 5.7.1 EEPROM control/status register (EECSR) Reset value: 0000 0000 (00h) Bits 7:2 = Reserved, forced by hardware to 0. Bit 1 = E2LAT Latch Access Transfer This bit is set by software. It is cleared by hardware at the end of the programming cycle. It can only be cleared by software if the E2PGM bit is cleared. 0: Read mode 1: Write mode Bit 0 = E2PGM Programming control and status This bit is set by software to begin the programming cycle. At the end of the programming cycle, this bit is cleared by hardware. 0: Programming finished or not yet started 1: Programming cycle is in progress Note: If the E2PGM bit is cleared during the programming cycle, the memory data is not guaranteed. 7 0 00 000 0 E2LAT E2PGM Read/Write Table 5. Data EEPROM register map and reset values Address (Hex.) Register label 765 432 1 0 0020h EECSR Reset value 000 000 E2LAT 0 E2PGM 0 |
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