STM8L151C2 datasheet(20/122 Pages) STMICROELECTRONICS

20 / 122 page

Functional overview

STM8L151x2, STM8L151x3

20/122

DocID018780 Rev 9

3.6

Memories

The low-density STM8L151x2/3 devices have the following main features:

•

Up to 1 Kbyte of RAM

•

The non-volatile memory is divided into three arrays:

–

Up to 8 Kbyte of low-density embedded Flash program memory

–

256 byte of data EEPROM

–

Option bytes.

The EEPROM embeds the error correction code (ECC) feature.

The option byte protects part of the Flash program memory from write and readout piracy.

3.7

DMA

A 4-channel direct memory access controller (DMA1) offers a memory-to-memory and

peripherals-from/to-memory transfer capability. The 4 channels are shared between the

following IPs with DMA capability: ADC1, I2C1, SPI1, USART1, the three Timers.

3.8

Analog-to-digital converter

•

12-bit analog-to-digital converter (ADC1) with 25 channels (including 1 fast channel),

temperature sensor and internal reference voltage

•

Conversion time down to 1 µs with fSYSCLK= 16 MHz

•

Programmable resolution

•

Programmable sampling time

•

Single and continuous mode of conversion

•

Scan capability: automatic conversion performed on a selected group of analog inputs

•

Analog watchdog

•

Triggered by timer

Note:

ADC1 can be served by DMA1.

3.9

Ultra-low-power comparators

The low-density STM8L151x2/3 embed two comparators (COMP1 and COMP2) sharing the

same current bias and voltage reference. The voltage reference can be internal or external

(coming from an I/O).

•

One comparator with fixed threshold (COMP1).

•

One comparator rail to rail with fast or slow mode (COMP2). The threshold can be one

of the following:

–

External I/O

–

Internal reference voltage or internal reference voltage sub multiple (1/4, 1/2, 3/4)

The two comparators can be used together to offer a window function. They can wake up

from Halt mode.

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