STM8SPLNB1 datasheet(17/44 Pages) STMICROELECTRONICS

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STM8SPLNB1

Configuration parameters

3. When an application supports the wide RF band only one local oscillator with a frequency FLO is present

in the LNB. In this case the selection of the high or the low band for the legacy output is performed by a

dedicated SaTCR.

Two parameters are needed for the band selection:

- The tuning word for the low band selection = [(FLO (MHz) - FLow (MHz))/4] - 350: where FLow

corresponds to the Low LO frequency.

- The tuning word for the high band selection = [(FLO (MHz) - FHigh (MHz))/4] - 350: where FHigh

corresponds to the High band LO frequency.

Example: in a wide band application with FLO= 13250 MHz, for emulating a low band local oscillator at

9750 MHz, index 0x0D and index 0x0E must be loaded with the decimal value dec [0D:0E] = round

((13250-9750)/4) - 350 = 525.

4. Matrix truth table for SaTCRx or legacy:

1) If 4 RF inputs are implemented then the matrix truth table has coding on 2 bytes: “aaaabbbbccccdddd”

where:

aaaa = selection of Feed1 on SaTCRx, aaaa = [MAT4, MAT3, MAT2, MAT1]

bbbb = selection of Feed0 on SaTCRx, bbbb = [MAT4, MAT3, MAT2, MAT1]

cccc = selection of Feed3 on SaTCRx, cccc = [MAT4, MAT3, MAT2, MAT1]

dddd = selection of Feed2 on SaTCRx,dddd = [MAT4, MAT3, MAT2, MAT1]

2) If 8 RF inputs are implemented then the truth table given in Table 15: Truth table for support of 8 RF

inputs is used.

5. To enable the support of 8 RF inputs: the value ‘0x0000’ has to be programmed in index 15h and 16h.

SaTCRs gain value: it has the following format on two bytes: “AaBbCcDd EeFfGgHh” where Aa= gain for

SaTCR1, Bb = gain for SaTCR2, Cc= gain for SaTCR3, Dd=gain for SaTCR4, Ee= gain for SaTCR5, Ff=

gain for SaTCR6, Gg= gain for SaTCR7, Hh=gain for SaTCR8 or legacy SaTCR. Upper case letters and

upper case letters indicate LNA and IF gain, respectively.

6. SaTCRs number does not include the legacy SaTCR for the wide RF band applications.

7. Defines assignment of SaTCR to I2C bus. 1 = incremental order mode, 0 = ST7LNB1 compatible mode or

incremental order mode in dependency from MODE pin (see Table 1: STM8SPLNB1 pins description)

state. See notes under Table 2: SaTCRs implementation - ST7LNB1 compatible mode and Table 3:

SaTCRs implementation - incremental order mode for details in assignment.

8. Reserved bytes: do not write to this location.

Table 15. Truth table for support of 8 RF inputs

Feed

MAT1

MAT2

MAT3

MAT4

000

100

010

110

001

101

011

111

Table 16. Application types

number

application type

description

SaTCR control(1) (see Figure 6:

SaTCR control configuration)

– Control through I2C of up to 8 SaTCRs

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