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STA311B 데이터시트(PDF) 61 Page - STMicroelectronics |
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STA311B 데이터시트(HTML) 61 Page - STMicroelectronics |
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61 / 102 page ![]() DocID024340 Rev 1 61/102 STA311B Registers 102 8.2.53 Channel 1 and 2 output timing (0x33) 8.2.54 Channel 3 and 4 output timing (0x34) 8.2.55 Channel 5 and 6 output timing (0x35) 8.2.56 Channel 7 and 8 output timing (0x36) The centering of the individual channel PWM output periods can be adjusted by the output timing registers. The PWM slot settings can be chosen to ensure that pulse transitions do not occur at the same time on different channels using the same power device. There are 8 possible settings, the appropriate setting varies based on the application and connections to the FFX power devices. D7 D6 D5 D4 D3 D2 D1 D0 C2OT2 C2OT1 C2OT0 C1OT2 C1OT1 C1OT0 10 0 0 00 D7 D6 D5 D4 D3 D2 D1 D0 C4OT2 C4OT1 C4OT0 C3OT2 C3OT1 C3OT0 11 0 0 10 D7 D6 D5 D4 D3 D2 D1 D0 C6OT2 C6OT1 C6OT0 C5OT2 C5OT1 C5OT0 10 1 0 01 D7 D6 D5 D4 D3 D2 D1 D0 C8OT2 C8OT1 C8OT0 C7OT2 C7OT1 C7OT0 11 1 0 11 CnOT[2:0] PWM slot 000 1 001 2 010 3 011 4 100 5 101 6 110 7 111 8 |
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