L9658 datasheet(46/64 Pages) STMICROELECTRONICS

46 / 64 page

Functional description

L9658

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Doc ID 14219 Rev 3

DEPEN status flag (bit D12) indicates the state of DEPEN pin.

ARM status flag indicates the state of the respective arming signal, including the pulse

stretch timer. If the pulse stretch timer is initiated by a deployment command, it does not

assert the arming status flag. This flag is de/asserted as soon as the de-glitch timer is

expired.

Deploy status bits (bit D7 through bit D0) report the status of internal deployment. Bit D8 in

the monitor mode command determines which status information device needs to be

reported in D7 through bit D0.

4.12.4

Deployment driver SPI fault response

This SPI fault response indicates a fault in the last MOSI transmission. The device uses the

parity bit to determine the integrity of the MOSI command transmission. This response is

defined as shown in the following table.

4.13

Arming SPI bit definition

4.13.1

Arming MOSI_A bit definition

Arming MOSI_A is defined as shown in figure below.

4.13.2

ARM[01..67]

Arming command. These bits are used to enable/disable arming signal. A value of 1

enables the arming signal for the respective loop-pair. A value of 0 disables the arming

signal for the respective loop-pair. When device is in reset, all arming signals are disabled.

Table 29.

MISO SPI fault response

Bit

State

Description

D15

Always ‘1’

D14

Always ‘1’

D13

Always ‘1’

D12

Parity error or message error during a deployment(1)

When a parity error is detected, the L9658 reports E000h. During a deployment, when an invalid message

is detected, he L9658 reports also E000h. Refer to Table 12 for the description of an invalid message

during a deployment. Bit D12 reports an incorrect number of clocks/bits. When an incorrect number of

clocks/bits is detected, bit D12 is asserted (F000h).

Incorrect number of clocks/bits

D11 – D0

Don’t Care

Table 30.

Arming MOSI_A bit definition

7654321

ARM67

ARM45

ARM23

ARM01

ARM67*

ARM45*

ARM23*

ARM01*

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