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A8603KESTR-R 데이터시트(PDF) 22 Page - Allegro MicroSystems

부품명 A8603KESTR-R
상세설명  Multiple-Output Regulator for Automotive LCD Displays
PDF  42 Pages
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제조업체  ALLEGRO [Allegro MicroSystems]
홈페이지  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

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Multiple-Output Regulator for
Automotive LCD Displays
A8603
22
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Boost Switching Frequency
The boost stage switching frequency, fSW , of the A8603 can be
programmed by using an external resistor between the FSET pin
to GND, or it can be synchronized to an external clock frequency
between 350 kHz and 2.25 MHz.
During startup, the A8603 senses the FSET pin for any external
SYNC signal. If periodic logic transitions are detected (Low <
0.4 V or High > 1.5 V), this is evaluated as an external clock
signal, and the boost switching frequency is synchronized to it.
If no periodic signal is detected, the bias current flowing through
FSET_SYNC pin is used to determine the switching frequency.
The bias current is set by an external resistor, RFSET , on the
FSET_SYNC pin. The relation between RFSET and switching
frequency is given as:
RFSET = 10.21 / (fSW – 0.0025)
(3)
where RFSET is in kΩ and fSW is in MHz.
This relationship is charted in Figure 9. For example, to get a
switching frequency of 2 MHz requires an RFSET of 5.11 kΩ.
0
5
10
15
20
25
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
R(k)
FSET
Figure 9: Boost Switching Frequency as a Function of
FSET Resistance
Suppose the A8603 is started up with a valid external SYNC
signal, but the SYNC signal is lost during normal operation. In
that case, one of the following happens
• If the external SYNC signal is high impedance (open), the
A8603 continues normal operation, at the switching frequency
set by RFSET . No FAULT flag is generated
• If the external SYNC signal is stuck at low (shorted to
ground), the A8603 begins a shutdown sequence, at the
switching frequency set by the internal 1 MHz oscillator. The
FAULT pin is pulled low and the internal error counter is
increased by 1.
Note:
To prevent generating a fault when the external SYNC signal
is stuck at low, the circuit shown in Figure 10 can be used.
When the external SYNC signal goes low, the A8603 will con-
tinue to operate normally at the switching frequency set by
RFSET. No FAULT flag is generated.
A8603
Schottky
Barrier
Diode
FSET
R
FSET
10.2 k
220 pF
External
Synchronization
Signal
Figure 10: Countermeasure to Prevent External Sync
Signal Stuck-at-Low Fault



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