 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
HT66F4530 데이터시트(PDF) 138 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT66F4530 데이터시트(HTML) 138 Page - Holtek Semiconductor Inc |
|
|
138 / 224 page  Rev. 1.00 138 De�e��e� �1� �01� Rev. 1.00 139 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers SPI Bus Enable/Disable ToenabletheSPIbus,setCSEN=1andSCS=0,thenwaitfordatatobewrittenintotheSIMD (TXRXbuffer)register.FortheMasterMode,afterdatahasbeenwrittentotheSIMD(TXRX buffer)register,thentransmissionorreceptionwillstartautomatically.Whenallthedatahasbeen transferred,theTRFbitshouldbesethigh.FortheSlaveMode,whenclockpulsesarereceivedon SCK,dataintheTXRXbufferwillbeshiftedoutordataonSDIwillbeshiftedin. WhentheSPIbusisdisabled,SCK,SDI,SDOandSCScanbecomeI/Opinsorotherpin-shared functionsusingthecorrespondingpin-sharedcontrolbits. SPI Operation Allcommunicationiscarriedoutusingthe4-lineinterfaceforeitherMasterorSlaveMode. TheCSENbitintheSIMC2registercontrolstheoverallfunctionoftheSPIinterface.Settingthis bithighwillenabletheSPIinterfacebyallowingtheSCSlinetobeactive,whichcanthenbeused tocontroltheSPIinterface.IftheCSENbitislow,theSPIinterfacewillbedisabledandtheSCS linewillbeinafloatingconditionandcanthereforenotbeusedforcontroloftheSPIinterface. IftheCSENbitandtheSIMENbitintheSIMC0aresethigh,thiswillplacetheSDIlineina floatingconditionandtheSDOlinehigh.IfinMasterModetheSCKlinewillbeeitherhighorlow dependingupontheclockpolarityselectionbitCKPOLBintheSIMC2register.IfinSlaveMode theSCKlinewillbeinafloatingcondition.IftheSIMENbitislow,thenthebuswillbedisabled andSCS,SDI,SDOandSCKwillallbecomeI/Opinsortheotherfunctionsusingthecorresponding pin-sharedcontrolbits.IntheMasterModetheMasterwillalwaysgeneratetheclocksignal.The clockanddatatransmissionwillbeinitiatedafterdatahasbeenwrittenintotheSIMDregister. IntheSlaveMode,theclocksignalwillbereceivedfromanexternalmasterdeviceforbothdata transmissionandreception.Thefollowingsequencesshowtheordertobefollowedfordatatransfer inbothMasterandSlaveMode. • Master Mode: • Step1 SelecttheSPIMastermodeandclocksourceusingtheSIM2~SIM0bitsintheSIMC0control register. • Step2 SetuptheCSENbitandsetuptheMLSbittochooseifthedataisMSBorLSBfirst,thissetting mustbethesamewiththeSlavedevices. • Step3 SetuptheSIMENbitintheSIMC0controlregistertoenabletheSPIinterface. • Step4 Forwriteoperations:writethedatatotheSIMDregister,whichwillactuallyplacethedatainto theTXRXbuffer.ThenusetheSCKandSCSlinestooutputthedata.Afterthis,gotostep5. Forreadoperations:thedatatransferredinontheSDIlinewillbestoredintheTXRXbuffer untilallthedatahasbeenreceivedatwhichpointitwillbelatchedintotheSIMDregister. • Step5 ChecktheWCOLbitifsethighthenacollisionerrorhasoccurredsoreturntostep4.Ifequalto zerothengotothefollowingstep. • Step6 ChecktheTRFbitorwaitforaSPIserialbusinterrupt. • Step7 ReaddatafromtheSIMDregister. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
