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CS43130 데이터시트(PDF) 32 Page - Cirrus Logic

부품명 CS43130
상세설명  130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver
PDF  137 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43130 데이터시트(HTML) 32 Page - Cirrus Logic

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DS1073F1
CS43130
4.4 Alternate Headphone Inputs
5. Clear the PDN_HP bit.
Figure 4-8. External VCP_FILT Power-Down Sequence
For powering down in this mode, use the following recommended sequence. This assumes that the CS43130 starts from
the status where VCP_FILT± pin are presented with ±3.0 V, respectively.
1. Execute the power down sequence per Section 5.7.
2. Wait 8 ms after I2C ACK.
3. Start to shut-off external supply to VCP_FILT± pins.
4. Wait until Hi-Z mode is presented on VCP_FILT± pins.
5. Clear EXT_VCPFILT.
4.4 Alternate Headphone Inputs
The top-level schematic of the alternate headphone inputs is shown in Fig. 4-9. Bits PDN_HP and HP_IN_EN configure
the audio source for the HPOUT pins. The switches connected to HPINx are controlled by HP_IN_EN. The switches
connected to the internal headphone driver are controlled by PDN_HP. When the alternate headphone inputs are selected
(HP_IN_EN = 1), the CS43130 internal headphone driver output needs to be disconnected (PDN_HP = 1). Likewise, when
the CS43130 internal headphone drivers are enabled, the HPINx switch needs to be open and not in the signal path. User
should refer to the Applications section for details on the required sequence of enable and disable HPINx path.
Figure 4-9. Alternative Headphone Input Setup
EXT_VCPFILT
PDN_HP
VCP_FILT+
VCP_FILT‐
8 ms
+3.0 V
‐3.0 V
Hi‐Z
Hi‐Z
HPREFB
HPOUTA
HPOUTB
HPINA
HPINB
HPREFA
HPREFB
HPOUTA
HPOUTB
HPINA
HPINB
HPREFA
PDN_HP=0
HP_IN_EN=0
PDN_HP=1
HP_IN_EN=1
HPREFB
HPOUTA
HPOUTB
HPINA
HPINB
HPREFA
PDN_HP=1
HP_IN_EN=0



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