 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
CC3220MODASM2MONR 데이터시트(PDF) 32 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
CC3220MODASM2MONR 데이터시트(HTML) 32 Page - Texas Instruments |
|
|
32 / 100 page  Copyright © 2017, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback Product Folder Links: CC3220MOD CC3220MODA 32 CC3220MOD, CC3220MODA SWRS206B – MARCH 2017 – REVISED AUGUST 2017 www.ti.com NOTE The ADC inputs are tolerant up to 1.8 V (see Section 5.14.5.6 for further details on the useable range of the ADC). The digital pads can tolerate up to 3.6 V. Hence, take care to prevent accidental damage to the ADC inputs. TI recommends first disabling the output buffers of the digital I/Os corresponding to the desired ADC channel (that is, converted to Hi-Z state), and thereafter disabling the respective pass switches (S7 [Pin 47], S8 [Pin 48], S9 [Pin 49], and S10 [Pin 50]). For more information, see Drive Strength and Reset States for Analog-Digital Multiplexed Pins. 4.5 Drive Strength and Reset States for Analog-Digital Multiplexed Pins Table 4-5 describes the use, drive strength, and default state of analog- and digital-multiplexed pins at first-time power up and reset (nRESET pulled low). Table 4-5. Drive Strength and Reset States for Analog-Digital Multiplexed Pins PIN BOARD LEVEL CONFIGURATION AND USE DEFAULT STATE AT FIRST POWER UP OR FORCED RESET STATE AFTER CONFIGURATION OF ANALOG SWITCHES (ACTIVE, LPDS, and HIB POWER MODES) MAXIMUM EFFECTIVE DRIVE STRENGTH (mA) 25 Connected to the enable pin of the RF switch (ANT_SEL1). Other use is not recommended. Analog is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 26 Connected to the enable pin of the RF switch (ANT_SEL2). Other use is not recommended. Analog is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 44 Generic I/O Analog is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 42 Generic I/O Analog is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 47 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 48 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 49 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 50 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
