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WM8803CDT/V 데이터시트(PDF) 12 Page - Wolfson Microelectronics plc

부품명 WM8803CDT/V
상세설명  DIGITAL AUDIO INTERFACE RECEIVER
PDF  45 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8803CDT/V 데이터시트(HTML) 12 Page - Wolfson Microelectronics plc

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WM8803
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PP Rev 1.1 September 2003
12
OSCILLATOR AMPLIFIER (XIN AND XOUT)
The following methods can be used to supply a clock signal to the internal oscillator amplifier.
(a) Oscillator element
CLKOUT
XIN
XOUT
(b) External clock signal
CLKOUT
XIN
XOUT
CLKOUT
XIN
XOUT
(c) CLKOUT clock signal
Figure 5 XIN and XOUT Circuit Structures
If an oscillator element is used, it is recommended that it provides the desired system operating
frequency as its fundamental frequency. Since the load capacitance depends on the oscillator
element characteristics, the circuit must be designed for the crystal used.
In normal operation, the clock signal to the XIN pin should be supplied at all times.
An externally supplied clock is used when the PLL circuit is unlocked and when XIN is the clock
source. A clock source input to XIN is also required when calculating the input data sampling
frequency.
A clock of frequency 11.2896, 12.288, 16.9344, 22.5792, 24.576, or 33.8688MHz that matches the
setting of the XISEL[2:0] should be applied. Digital data should only be input after the XISEL[2:0] has
been set to match the oscillator or external clock input frequency. The WM8803 may malfunction if
data is input when the input frequency and XISEL[2:0] frequency do not match.
The WM8803 will operate even when the frequency set with the XISEL[2:0] and the frequency
supplied to XIN differ. However, maintenance of continuity of clock switching and the input fs
calculation are not guaranteed.
The WM8803 supports an application in which CLKOUT is connected to XIN and XISEL3 is set, thus
requiring no oscillator element. However, since only the VCO is used as the source clock, when the
PLL is not in the locked state the VCO free-running frequency (10M to 16MHz) will be output from
CLKOUT. Furthermore, input fs calculation and limitation are not possible with this technique.
Additionally, since no clock is supplied to the oscillator amplifier circuit when the VCO is set to the
stopped state, the whole system will go to the stopped state. This function limits settings to
PLLCK[1:0] = “00”.



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