LAN91C100FD datasheet(12/79 Pages) SMSC

12 / 79 page

FEAST Fast Ethernet Controller with Full Duplex Capability

Rev. 10/14/2002

Page 12

SMSC DS – LAN91C100FD Rev. D

PRELIMINARY

I/O4

Bidirectional buffer with 2mA source and 4mA sink

I/O24

Bidirectional buffer with 12mA source and 24mA sink

Input buffer with TTL levels

Input buffer with Schmitt Trigger Hysteresis

Iclk

Clock input buffer

DC levels and conditions defined in the DC Electrical Characteristics section.

Table 3.1 - LAN91C100FD Pin Requirements

FUNCTION

PIN SYMBOLS

NUMBER OF PINS

System Address Bus

A1-A15, AEN, nBE0-nBE3

System Data Bus

D0-D31

System Control Bus

RESET, nADS, LCLK, ARDY,

nRDYRTN, nSRDY, INTR0-

INTR3, nLDEV, nRD, nWR,

nDATACS, nCYCLE, W/nR,

nVLBUS

Serial EEPROM

EEDI, EEDO, EECS, EESK,

ENEEP, IOS0-IOS2

RAM Data Bus

RD0-RD31

RAM Address Bus

RA2-RA16

RAM Control Bus

nROE, nRWE0-nRWE3,

RCVDMA, RDMAH

Crystal Oscillator

XTAL1, XTAL2

Power

VDD, AVDD

Ground

GND, AGND

External ENDEC 10 Mbps

TXEN, TXD, CRS, COL, RXD,

TXC, RXC, LBK, nLNK,

nFSTEP, AUISEL, MIISEL

Physical Interface 100 Mbps

TXEN100, CRS100, COL100,

RX_DV, RX_ER, TXD0-TXD3,

RXD0-RXD3, MDI, MDO, MCLK

Clocks

TX25, RX25

Miscellaneous

nCSOUT, nRXDISC

TOTAL

205

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