LAN91C100FD datasheet(20/79 Pages) SMSC

20 / 79 page

FEAST Fast Ethernet Controller with Full Duplex Capability

Rev. 10/14/2002

Page 20

SMSC DS – LAN91C100FD Rev. D

PRELIMINARY

The transmit byte count least significant bit will be assumed 0 by the controller regardless of the value

written in memory.

DATA AREA - The data area starts at offset 4 of the packet structure and can extend up to 2043 bytes.

The data area contains six bytes of DESTINATION ADDRESS followed by six bytes of SOURCE

ADDRESS, followed by a variable-length number of bytes. On transmit, all bytes are provided by the

CPU, including the source address. The LAN91C100FD does not insert its own source address. On

receive, all bytes are provided by the CSMA side.

The 802.3 Frame Length word (Frame Type in Ethernet) is not interpreted by the LAN91C100FD. It is

treated transparently as data both for transmit and receive operations.

CONTROL BYTE - For transmit packets the CONTROL BYTE is written by the CPU as:

ODD

CRC

ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE.

If clear, the number of data bytes is even and the byte before the CONTROL BYTE is not transmitted.

CRC - When set, CRC will be appended to the frame. This bit has only meaning if the NOCRC bit in the

TCR is set.

For receive packets the CONTROL BYTE is written by the controller as:

ODD

ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE.

If clear, the number of data bytes is even and the byte before the CONTROL BYTE should be ignored.

RECEIVE FRAME STATUS WORDRECEIVE FRAME STATUS WORD

This word is written at the beginning of each receive frame in memory. It is not available as a register.

HIGH

BYTE

ALGN

ERR

BROD

CAST

BAD

CRC

ODD

FRM

TOOLNG

TOO

SHORT

LOW

BYTE

HASH VALUE

MULT

CAST

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