P89LPC933FDH datasheet(25/75 Pages) PHILIPS

25 / 75 page

9397 750 15113

Product data sheet

Rev. 06 — 20 June 2005

25 of 75

Philips Semiconductors

P89LPC933/934/935/936

8-bit microcontroller with accelerated two-clock 80C51 core

external clock input on X1) and if the RTC is not using the crystal oscillator as its clock

source. This allows external devices to synchronize to the P89LPC933/934/935/936. This

output is enabled by the ENCLK bit in the TRIM register.

The frequency of this clock output is 1

⁄

2 that of the CCLK. If the clock output is not needed

in Idle mode, it may be turned off prior to entering Idle, saving additional power.

8.4 On-chip RC oscillator option

The P89LPC933/934/935/936 has a 6-bit TRIM register that can be used to tune the

frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory

preprogrammed value to adjust the oscillator frequency to 7.373 MHz

± 1 % at room

temperature. End-user applications can write to the TRIM register to adjust the on-chip

RC oscillator to other frequencies.

8.5 Watchdog oscillator option

The watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator

can be used to save power when a high clock frequency is not needed.

8.6 External clock input option

In this conﬁguration, the processor clock is derived from an external source driving the

XTAL1/P3.1 pin. The rate may be from 0 Hz up to 18 MHz. The XTAL2/P3.0 pin may be

used as a standard port pin or a clock output. When using an oscillator frequency

above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit

is required to hold the device in reset at power-up until VDD has reached its

speciﬁed level. When system power is removed VDD will fall below the minimum

speciﬁed operating voltage. When using an oscillator frequency above 12 MHz, in

some applications, an external brownout detect circuit may be required to hold the

device in reset when VDD falls below the minimum speciﬁed operating voltage.

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