| 전자부품 데이터시트 검색엔진 |
|
P89LPC933FDH 데이터시트(PDF) 29 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
P89LPC933FDH 데이터시트(HTML) 29 Page - NXP Semiconductors |
|
29 / 75 page ![]() 9397 750 15113 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 06 — 20 June 2005 29 of 75 Philips Semiconductors P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core These external interrupts can be programmed to be level-triggered or edge-triggered by setting or clearing bit IT1 or IT0 in register TCON. In edge-triggered mode, if successive samples of the INTn pin show a HIGH in one cycle and a LOW in the next cycle, the interrupt request flag IEn in TCON is set, causing an interrupt request. If an external interrupt is enabled when the P89LPC933/934/935/936 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to Section 8.15 “Power reduction modes” for details. (1) See Section 8.19 “CCU (P89LPC935/936)” (2) P89LPC935/936 Fig 9. Interrupt sources, interrupt enables, and power-down wake-up sources 002aab081 IE0 EX0 IE1 EX1 BOF EBO KBIF EKBI interrupt to CPU wake-up (if in power-down) EWDRT CMF2 CMF1 EC EA (IE0.7) TF1 ET1 TI & RI/RI ES/ESR TI EST SI EI2C SPIF ESPI RTCF ERTC (RTCCON.1) WDOVF TF0 ET0 any CCU interrupt(1) ECCU ENADCI0(2) ADCI0(2) ENADCI1 ADCI1 ENBI0(2) BNDI0(2) ENBI1 BNDI1 EEIF(2) EADEE (P89LPC935) EAD (P89LPC933/934) |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |