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89LPC925 데이터시트(PDF) 33 Page - NXP Semiconductors |
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89LPC925 데이터시트(HTML) 33 Page - NXP Semiconductors |
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33 / 49 page ![]() Philips Semiconductors P89LPC924/925 8-bit microcontrollers with accelerated two-clock 80C51 core Product data Rev. 03 — 15 December 2004 33 of 49 9397 750 14471 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 8.21 Analog comparators Two analog comparators are provided on the P89LPC924/925. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logical one (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable pins) is greater than the negative input (selectable from a pin or an internal reference voltage). Otherwise the output is a zero. Each comparator may be configured to cause an interrupt when the output value changes. The overall connections to both comparators are shown in Figure 10. The comparators function to VDD = 2.4 V. When each comparator is first enabled, the comparator output and interrupt flag are not guaranteed to be stable for 10 microseconds. The corresponding comparator interrupt should not be enabled during that time, and the comparator interrupt flag must be cleared before the interrupt is enabled in order to prevent an immediate interrupt service. When a comparator is disabled the comparator’s output, COx, goes HIGH. If the comparator output was LOW and then is disabled, the resulting transition of the comparator output from a LOW to HIGH state will set the comparator flag, CMFx. This will cause an interrupt if the comparator interrupt is enabled. The user should therefore disable the comparator interrupt prior to disabling the comparator. Additionally, the user should clear the comparator flag, CMFx, after disabling the comparator. 8.21.1 Internal reference voltage An internal reference voltage generator may supply a default reference when a single comparator input pin is used. The value of the internal reference voltage, referred to as VREF, is 1.23 V ±10%. Fig 10. Comparator input and output connections. Comparator 1 CP1 CN1 (P0.4) CIN1A (P0.3) CIN1B (P0.5) CMPREF VREF OE1 Change Detect CO1 CMF1 Interrupt 002aaa422 CMP1 (P0.6) EC Change Detect CMF2 Comparator 2 OE2 CO2 CMP2 (P0.0) CP2 CN2 (P0.2) CIN2A (P0.1) CIN2B |
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