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HD74AC 데이터시트(PDF) 3 Page - Hitachi Semiconductor |
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HD74AC 데이터시트(HTML) 3 Page - Hitachi Semiconductor |
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3 / 52 page ![]() FACT Descriptions and Family Characteristics 2 1.3 Low Power CMOS Operation If there is one single characteristic that justifies the existence of CMOS, it is low power dissipation. In the quiescent state, FACT draws three orders of magnitude less power than the equivalent LS or ALS TTL device. This enhances system reliability; because costly regulated high current power supplies, heat sinks and fans are eliminated. FACT logic devices are ideal for portable systems such as laptop computers and backpack communications systems. Operating power is also very low for FACT logic. Power consumption of various technologies with a clock frequency of 1 MHz is shown below. • FACT = 0.1 mW/gate • ALS = 1.2 mW/gate • LS = 2.0 mW/gate • HC = 0.1 mW/gate Figure 1 illustrates the effects of I CC versus power supply voltage (VCC) for two load capacitance values: 50 pF and stray capacitance. The clock frequency was 1 MHz for the measurements. CL = 50 pF @ 1 MHz CL = Fixture Capacitance @ 1 MHz 6 4 VCC (Volts) 2 0 0 100 200 300 400 500 Figure 1 I CC vs VCC 1.4 AC Performance In comparison to LS, ALS and HC families, FACT devices have faster internal gate delays as well as the basic gate delays. Additionally, as the level of integration increases, FACT logic leads the way to very high-speed systems. The example below describes typical values for a HD74XX138, 3 to 8 line decoder. • FACT = 6.0 ns @ C L = 50 pF • ALS = 12.0 ns @ C L = 50 pF • LS = 27.0 ns @ C L = 15 pF • HC = 17.0 ns @ C L = 50 pF |
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