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MFC2000 데이터시트(PDF) 206 Page - List of Unclassifed Manufacturers |
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MFC2000 데이터시트(HTML) 206 Page - List of Unclassifed Manufacturers |
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206 / 426 page ![]() MFC2000 Multifunctional Peripheral Controller 2000 Hardware Description 8-2 Conexant 100723A Table 8-1. Untitled Table Name Description adclk Clock for ADC circuit The maximum frequency of this clock is 5 MHz. This clock is guaranteed to be low while “sample” is high. clamp Clock for clamping circuit The maximum frequency of this clock is 5 MHz. gain[3:0] Selector for gain adjustment on PGA circuit offset[5:0] Selector for offset adjustment on DAC circuit sample Clock for sampling circuit The maximum frequency of this clock is 5 MHz. The minimum (high) pulse width is 50 ns. adcout[11:0] Digital data from ADC circuit TADCREF Analog signal as a reference voltage for TADC Table 8-2. Untitled Table Name Description ADCREFN An internally generated reference voltage ADCREFP An internally generated reference voltage ADGA Ground return from analog circuits ADGD Ground return from digital circuits ADVA +3.3V power supply for analog circuits ADVC An internally generated reference voltage ADVD +3.3V power supply for digital circuits SCIN Analog input for scanner signal 8.1.2 Offset Adjustment This offset adjustment contains DAC which takes digital input to configure the DAC and analog subtraction to subtract the incoming scanner signal with the analog signal from the DAC. This adjustment is used to remove/reduce the dark level offset on the scanner signal. The adjustment on DAC value is described below: Table 8-3. Offset Adjustment on DAC Parameter Min Typ Max Units offset[5:0] 000000 -0.1 V 11111 1.9 V |
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