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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

9-6

Conexant

100723A

9.1.5

First and Last Black Data Detector Design

Below is a schematic representation of the Black Data Detector. The counter and registers get cleared at the start

of each line. On the left side of the diagram is the half word counter that is incremented each time a half word is

pushed into the FIFO (lcl_nxt). When the line starts, each time a lcl_nxt or lcl_wr shifts data into the output FIFO

holding register, the serial data is checked for black data. If black data is detected, the End Of White flag is set.

Once set, the logic waits until the counter is incremented, (the holding register is pushed into the FIFO data

As data continues to be shifted into the FIFO, the logic at the bottom of the Figure 1-2-2 continues to check for

black data. Each time black data is detected the Blk Data Det flag is set. After that half word is loaded into the

FIFO data register (counter counts), the counter value is loaded into the Last Black Data Register.

9.2

External memory setup

•

The external memory is selected as the data source by setting bit 2 in the BiResConvCtrl register to one in

the Bi-level Resolution Conversion block.

•

The block size of the data in the external memory for the Bi-level resolution conversion is set in the

DMA9BlockSize register of the DMA Controller.

•

Vertical Line ORing for the resolution converted data is enabled by setting bit 0 in the BiResConvCtrl register

in the Bi-level Resolution Conversion block.

•

The Bi-level resolution conversion is initiated by setting bit 1 (first to 1 and then, to 0) in the BiResConvCtrl

T4/T6 Control

•

T4/T6 Decoder Bi-level resolution conversion is enabled by setting bit 5 in the ‘T4Config’ register in the T4/T6

Compression/Decompression Logic.

•

Vertical Line ORing for the T4 Decoded data is enabled by setting bit 3 in the ‘T4Control’ register in the T4/T6

Compression/Decompression Logic. Vertical ORing for T4 decoded data is only valid if resolution conversion

is also enabled.

Programming the Expansion/reduction Ratio

The Bi-level Resolution Conversion Ratio register (BiResConRatio) controls the horizontal resolution conversion

expansion or reduction ratio. The BiResConRatio register is cleared on Reset. The value programmed into the

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