MFC2000 datasheet(396/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

24-10

Conexant

100723A

Bit 3

Start Countach DMA

Writing a one to this bit causes the Countach DMA controller to fetch

parameters from scratch pad and begin a DMA transfer.

Bit 2

Abort Countach DMA

Writing a one to this bit causes any Countach DMA operation (CDMA

channel 1) to be aborted. The Countach receives the Countach DMA

Done interrupt after the DMA has aborted (EXTIRQ2).

Bit 1

Reset Countach Subsystem

Writing a one to this bit resets the Countach Subsystem and the

Countach Subsystem Interface which contains the DMA FIFOs.

Bit 0

Interrupt Countach Subsystem

Writing a one to this bit generates an interrupt to the Countach

Subsystem (EXTIRQ).

24.3.3 Internal Memory

The ARM Bus Interface contains two 4

× 16 buffers for DMA transfers between memory attached to the ARM Bus

Subsystem and the Countach SDRAM. These buffers can be accessed by the ARM as either bytes or halfwords.

The two buffers are located at the following addresses:

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

ARM to Countach

DMA Buffer

(A2CDmaBuf)

$01FF830x

A2C Buffer

Data [15]

A2C Buffer

Data [14]

A2C Buffer

Data [13]

A2C Buffer

Data [12]

A2C Buffer

Data [11]

A2C Buffer

Data [10]

A2C Buffer

Data [9]

A2C Buffer

Data [8]

Rst. Value

00h

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

ARM to Countach

DMA Buffer

(A2CDmaBuf)

$01FF830x

A2C Buffer

Data [7]

A2C Buffer

Data [6]

A2C Buffer

Data [5]

A2C Buffer

Data [4]

A2C Buffer

Data [3]

A2C Buffer

Data [2]

A2C Buffer

Data [1]

A2C Buffer

Data [0]

Rst Value

00h

Read Value

00h

$01FF8300-01

A2C DMA Buffer halfword 0

$01FF8302-03

A2C DMA Buffer halfword 1

$01FF8304-05

A2C DMA Buffer halfword 2

$01FF8306-07

A2C DMA Buffer halfword 3

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Countach to ARM

DMA Buffer

(C2ADmaBuf)

$01FF830x

C2A Buffer

Data [15]

C2A Buffer

Data [14]

C2A Buffer

Data [13]

C2A Buffer

Data [12]

C2A Buffer

Data [11]

C2A Buffer

Data [10]

C2A Buffer

Data [9]

C2A Buffer

Data [8]

Rst. Value

00h

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Countach to ARM

DMA Buffer

(C2ADmaBuf)

$01FF830x

C2A Buffer

Data [7]

C2A Buffer

Data [6]

C2A Buffer

Data [5]

C2A Buffer

Data [4]

C2A Buffer

Data [3]

C2A Buffer

Data [2]

C2A Buffer

Data [1]

C2A Buffer

Data [0]

Rst Value

00h

Read Value

00h

$01FF8308-09

C2A DMA Buffer halfword 0

$01FF830A-0B

C2A DMA Buffer halfword 1

$01FF830C-0D

C2A DMA Buffer halfword 2

$01FF830E-0F

C2A DMA Buffer halfword 3

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