MFC2000 datasheet(140/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

5-14

Conexant

100723A

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Watchdog Interval

(WatchdogInterval)

01FF8043

(Not Used)

Rst. Value

xxh

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Watchdog Interval

(WatchdogInterval)

01FF8042

Watchdog Interval (n = 0-255)

(n*1ms)

Rst. Value

00h

Read Value

00h

• Once enabled, the Watchdog Timer can only be disabled by reset.

• On reset, the Watchdog Timer is disabled until it is enabled by writing to the WatchdogInterval register

followed by writing $0F and $F0 to the WatchdogEnRetrigger register.

• The basic Watchdog time-out unit (1 ms) is based on the internal 125 µsec timer. Therefore, the

125µsPrescaler and MSINTPeriod registers (used to activate the timer) must be set in order to operate the

Watchdog Timer.

• The accuracy of the time-out period is equal to the accuracy of the 125 µsec timer with an additional error of

up to 1 msec (i.e., the amount of error is dependent on the relationship of the trigger point to the internal 1 msec

timer).

• If N is programmed into the WatchdogInterval register, the Watchdog Timer time-out period is "N * 1 ms" (N =

0 - 255).

• Reading the address of the WatchdogInterval register returns the value of N that was programmed into the

WatchdogInterval register.

• The following conditions do not enable the watchdog timer:

Only the first write to the WatchdogInterval register is valid. The subsequent writes to this register are ignored.

Any other data written to the WatchdogEnRetrigger register between the times $0F and $F0 are written is

ignored.

Once enabled, the Watchdog Timer is retriggered on the writing of alternate $0F and $F0. (Writing of any other

data, and the writing of repetitive $0F or $F0 is ignored.)

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