| 전자부품 데이터시트 검색엔진 |
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AR0134CSSC00SUEAD 데이터시트(PDF) 7 Page - ON Semiconductor |
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AR0134CSSC00SUEAD 데이터시트(HTML) 7 Page - ON Semiconductor |
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7 / 29 page ![]() AR0134CS www.onsemi.com 7 Figure 6. 9 y 9 mm 63-ball iBGA Package Top View (Ball Down) A B C D E F G H 1 2 34 56 7 8 VDD_PLL EXTCLK SADDR LINE_ VALID DOUT8 DOUT4 DOUT0 SLVSCN VDD_SLVS SCLK FRAME_ VALID DOUT9 DOUT5 DOUT1 SLVS0N SLVSCP (SLVS3N) SDATA PIXCLK DOUT10 DOUT6 DOUT2 SLVS0P SLVS2N (SLVS3P) DGND FLASH DOUT11 DOUT7 DOUT3 SLVS1N SLVS2P DGND DGND DGND DGND DGND DGND SLVS1P VDD VDD VDD VDD_IO VDD_IO VDD_IO VDD_IO VDD VAA AGND VAA_PIX RESERVED TEST TRIGGER VDD_IO VDD VAA AGND VAA_PIX RESERVED RESERVED OE_BAR RESET_ BAR STANDBY Table 3. PIN DESCRIPTIONS − 63-BALL IBGA PACKAGE Name iBGA Pin Type Description SLVS0_N A2 Output HiSPi serial data, lane 0, differential N SLVS0_P A3 Output HiSPi serial data, lane 0, differential P SLVS1_N A4 Output HiSPi serial data, lane 1, differential N SLVS1_P A5 Output HiSPi serial data, lane 1, differential P STANDBY A8 Input Standby-mode enable pin (active HIGH) VDD_PLL B1 Power PLL power SLVSC_N B2 Output HiSPi serial DDR clock differential N |
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