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MSP432P411VIPZ 데이터시트(PDF) 170 Page - Texas Instruments |
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MSP432P411VIPZ 데이터시트(HTML) 170 Page - Texas Instruments |
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170 / 212 page ![]() 170 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated (1) X = Don't care (2) Not available on the 64-pin RGC package. (3) Setting the PSEL1.x and PSEL0.x bits to 10 disables both the output driver and input Schmitt trigger to prevent leakage when analog signals are applied. (4) Setting P8SEL1.x and P8SEL0.x disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog signals. 6.12.14 Port P8 (P8.2 to P8.7) Input/Output With Schmitt Trigger Port Schematic: see Figure 6-13 Table 6-76 lists the settings to select the port functions. Table 6-76. Port P8 (P8.2 to P8.7) Pin Functions PIN NAME (P8.x) x FUNCTION CONTROL BITS OR SIGNALS (1) P8DIR.x P8SEL1.x P8SEL0.x P8.2/TA3.2/A23/L47 (2) 2 P8.2 (I/O) I: 0; O: 1 0 0 TA3.CCI2A 0 0 1 TA3.2 1 L47 (3) X 1 0 A23 (4) X 1 1 P8.3/TA3CLK/A22/L46 (2) 3 P8.3 (I/O) I: 0; O: 1 0 0 TA3CLK 0 0 1 DVSS 1 L46 (3) X 1 0 A22 (4) X 1 1 P8.4/A21/L45 (2) 4 P8.4 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 L45 (3) X 1 0 A21 (4) X 1 1 P8.5/A20/L44 (2) 5 P8.5 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 L44 (3) X 1 0 A20 (4) X 1 1 P8.6/A19/L19 (2) 6 P8.6 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 L19 (3) X 1 0 A19 (4) X 1 1 P8.7/A18/L18 (2) 7 P8.7 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 L18 (3) X 1 0 A18 (4) X 1 1 NOTE Take special care on the pins with ADC and LCD multiplexing to ensure that only one of these functions is enabled at any time. |
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