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MSP432P411VIPZ 데이터시트(PDF) 166 Page - Texas Instruments |
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MSP432P411VIPZ 데이터시트(HTML) 166 Page - Texas Instruments |
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166 / 212 page ![]() 166 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated (1) X = Don't care (2) Setting P5SEL1.x and P5SEL0.x disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog signals. 6.12.11 Port P5 (P5.0 to P5.5) Input/Output With Schmitt Trigger Port Schematic: see Figure 6-12 Table 6-73 lists the settings to select the port functions. Table 6-73. Port P5 (P5.0 to P5.5) Pin Functions PIN NAME (P5.x) x FUNCTION CONTROL BITS OR SIGNALS (1) P5DIR.x P5SEL1.x P5SEL0.x P5.0/A5 0 P5.0 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 N/A 0 1 0 DVSS 1 A5 (2) X 1 1 P5.1/A4 1 P5.1 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 N/A 0 1 0 DVSS 1 A4 (2) X 1 1 P5.2/A3 2 P5.2 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 N/A 0 1 0 DVSS 1 A3 (2) X 1 1 P5.3/A2 3 P5.3 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 N/A 0 1 0 DVSS 1 A2 (2) X 1 1 P5.4/A1 4 P5.4 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 N/A 0 1 0 DVSS 1 A1 (2) X 1 1 P5.5/A0 5 P5.5 (I/O) I: 0; O: 1 0 0 N/A 0 0 1 DVSS 1 N/A 0 1 0 DVSS 1 A0 (2) X 1 1 |
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