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4100 데이터시트(PDF) 25 Page - Cypress Semiconductor

부품명 4100
상세설명  Programmable System-on-Chip (PSoC짰)
PDF  43 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

4100 데이터시트(HTML) 25 Page - Cypress Semiconductor

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Document Number: 001-87220 Rev. *J
Page 25 of 43
PSoC® 4: PSoC 4100 Family
Datasheet
SID111B
A_INL
Integral non linearity
–1.5
–
+1.7
LSB
VDDD = 1.71 to 5.5,
500 ksps, VREF = 1 to
5.5.
SID112
A_DNL
Differential non linearity
–1
–
+2.2
LSB
VDDD = 1.71 to 5.5,
806 ksps, VREF = 1 to
5.5.
SID112A
A_DNL
Differential non linearity
–1
–
+2
LSB
VDDD = 1.71 to 3.6,
806 ksps, VREF =
1.71 to VDDD.
SID112B
A_DNL
Differential non linearity
–1
–
+2.2
LSB
VDDD = 1.71 to 5.5,
500 ksps, VREF = 1 to
5.5.
Table 12. SAR ADC DC Specifications (continued)
Spec ID#
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
Table 13. SAR ADC AC Specifications (Guaranteed by Characterization)
Spec ID#
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID108
A_SAMP_1
Sample rate with external reference
bypass cap
–
–
806
ksps
SID108A
A_SAMP_2
Sample rate with no bypass cap.
Reference = VDD
–
–
500
ksps
SID108B
A_SAMP_3
Sample rate with no bypass cap.
Internal reference
–
–
100
ksps
SID109
A_SNDR
Signal-to-noise and distortion ratio
(SINAD)
65
–
–
dB
FIN = 10 kHz
SID113
A_THD
Total harmonic distortion
–
–
–65
dB
FIN = 10 kHz.



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