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4100 데이터시트(PDF) 28 Page - Cypress Semiconductor

부품명 4100
상세설명  Programmable System-on-Chip (PSoC짰)
PDF  43 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

4100 데이터시트(HTML) 28 Page - Cypress Semiconductor

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Document Number: 001-87220 Rev. *J
Page 28 of 43
PSoC® 4: PSoC 4100 Family
Datasheet
SPI Specifications
Table 19. LCD Direct Drive AC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID159
FLCD
LCD frame rate
10
50
150
Hz
Table 20. Fixed UART DC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID160
IUART1
Block current consumption at 100 Kbps
–
–
55
µA
SID161
IUART2
Block current consumption at 1000 Kbps
–
–
312
µA
Table 21. Fixed UART AC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID162
FUART
Bit rate
–
–
1
Mbps
Table 22. Fixed SPI DC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID163
ISPI1
Block current consumption at 1 Mbps
–
–
360
µA
SID164
ISPI2
Block current consumption at 4 Mbps
–
–
560
µA
SID165
ISPI3
Block current consumption at 8 Mbps
–
–
600
µA
Table 23. Fixed SPI AC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID166
FSPI
SPI operating frequency (master; 6X
oversampling)
––
4
MHz
Table 24. Fixed SPI Master Mode AC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID167
TDMO
MOSI valid after Sclock driving edge
–
–
15
ns
SID168
TDSI
MISO valid before Sclock capturing
edge. Full clock, late MISO Sampling
used
20
–
–
ns
SID169
THMO
Previous MOSI data hold time with
respect to capturing edge at Slave
0–
–
ns
Table 25. Fixed SPI Slave Mode AC Specifications (Guaranteed by Characterization)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID170
TDMI
MOSI valid before Sclock capturing edge
40
–
–
ns
SID171
TDSO
MISO valid after Sclock driving edge
–
–
42 + 3 ×
Tscbclk
ns
SID171A
TDSO_ext
MISO valid after Sclock driving edge in
Ext. Clock mode
–
–
48
ns
SID172
THSO
Previous MISO data hold time
0
–
–
ns
SID172A
TSSELSCK
SSEL Valid to first SCK Valid edge
100
–
–
ns



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