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DLPC3470 데이터시트(PDF) 23 Page - Texas Instruments

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부품명 DLPC3470
상세설명  Display and Light Controller
PDF  70 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

DLPC3470 데이터시트(HTML) 23 Page - Texas Instruments

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VSYNC_WE
HSYNC_CS
DATAEN_CMD
tp_vsw
1 Frame
tp_vbp
tp_vfp
HSYNC_CS
DATAEN_CMD
tp_hsw
1 Line
tp_hfp
tp_hbp
PDATA(23/15:0)
P0
PCLK
P1
P2
P3
P
n-2
P
n-1
Pn
(This diagram assumes the VSYNC
active edge is the rising edge)
(This diagram assumes the HSYNC
active edge is the rising edge)
23
DLPC3470
www.ti.com
DLPS110 – APRIL 2018
Product Folder Links: DLPC3470
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
(1)
The minimum total vertical blanking is defined by the following equation: tp_tvb(min) = 6 + [6 × Max(1, Source_ALPF/ DMD_ALPF)] lines
where:
(a) SOURCE_ALPF = Input source active lines per frame
(b) DMD_ALPF = Actual DMD used lines per frame supported
(2)
Total horizontal blanking is driven by the max line rate for a given source which will be a function of resolution and orientation. The
following equation can be applied for this: tp_thb = Roundup[(1000 × ƒclock)/ LR] – APPL
where:
(a) ƒclock = Pixel clock rate in MHz
(b) LR = Line rate in kHz
(c) APPL is the number of active pixels per (horizontal) line.
(d) If tp_thb is calculated to be less than tp_hbp + tp_hfp then the pixel clock rate is too low or the line rate is too high, and one or both
must be adjusted.
6.12 Parallel Interface Frame Timing Requirements
MIN
MAX
UNIT
tp_vsw
Pulse duration – VSYNC_WE high
50% reference points
1
lines
tp_vbp
Vertical back porch (VBP) – time from the leading edge of
VSYNC_WE to the leading edge HSYNC_CS for the first active
line (see (1))
50% reference points
2
lines
tp_vfp
Vertical front porch (VFP) – time from the leading edge of the
HSYNC_CS following the last active line in a frame to the
leading edge of VSYNC_WE (see (1))
50% reference points
1
lines
tp_tvb
Total vertical blanking – time from the leading edge of
HSYNC_CS following the last active line of one frame to the
leading edge of HSYNC_CS for the first active line in the next
frame. (This is equal to the sum of VBP (tp_vbp) + VFP (tp_vfp).)
50% reference points
See (1)
lines
tp_hsw
Pulse duration – HSYNC_CS high
50% reference points
4
128
PCLKs
tp_hbp
Horizontal back porch – time from rising edge of HSYNC_CS
to rising edge of DATAEN_CMD
50% reference points
4
PCLKs
tp_hfp
Horizontal front porch – time from falling edge of
DATAEN_CMD to rising edge of HSYNC_CS
50% reference points
8
PCLKs
tp_thb
Total horizontal blanking – sum of horizontal front and back
porches
50% reference points
See (2)
PCLKs
Figure 4. Parallel Interface Frame Timing



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