T48C893 datasheet(25/82 Pages) ATMEL

25 / 82 page

T48C893

Rev. A4, 22-Jan-02

25 (82)

4.2.3

Bidirectional Port 5

This, and all other bidirectional ports include a bitwise

programmable Control Register (P5CR), which allows

the individual programming of each port bit as input or

output. It also opens up the possibility of reading the pin

condition when in output mode. This is a useful feature

for self testing and for serial bus applications.

The port pins can also be used as external interrupt inputs

(see figures 24 & 25). The interrupts (INT1 and INT6) can

be masked or independently configured to trigger on ei-

ther edge. The interrupt configuration and port direction

is controlled by the Port 5 Control Register (P5CR). An

additional low resistance pull–up/–down transistor mask

option provides an internal bus pull–up for serial bus ap-

plications.

The Port 5 Data Register (P5DAT) is I/O mapped to the

primary address register of address ’5’h and the Port 5

Control Register (P5CR) to the corresponding auxiliary

ured by writing first the low nibble then the high nibble

(see section 2.1 ”Addressing peripherals”).

Master reset

BP5y

Mask options

P5DATy

I/O Bus

IN enable

I/O Bus

Switched

Static

Pull-up

(Data out)

Static

Pull-down

pull-up

pull-down

Figure 24. Bidirectional Port 5

Bidir. Port

Data in

IN_Enable

BP53

P53M2 P53M1 P52M2 P52M1 P51M2 P51M1 P50M2 P50M1

Decoder

Bidir. Port

Data in

IN_Enable

BP52

I/O–bus

Bidir. Port

Data in

IN_Enable

BP51

I/O–bus

Bidir. Port

Data in

IN_Enable

BP50

INT1

INT6

P5CR:

13764

Figure 25. Port 5 external interrupts

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