T48C893 datasheet(29/82 Pages) ATMEL

29 / 82 page

T48C893

Rev. A4, 22-Jan-02

29 (82)

4.3

Universal Timer/Counter / Communication Module (UTCM)

The Universal Timer/counter/ Communication Module

(UTCM) consists of three timers (Timer 1 ,Timer 2,

Timer 3) and a Synchronous Serial Interface (SSI).

D Timer 1 is an interval timer that can be used to

generate periodical interrupts and as prescaler for

Timer 2, Timer 3, the serial interface and the watch-

dog function.

D Timer 2 is an 8/12-bit timer with an external clock in-

put (T2I) and an output (T2O).

D Timer 3 is an 8-bit timer/counter with its own input

(T3I) and output (T3O).

D The SSI operates as two wire serial interface or as shift

modulator and demodulator units work together with

the timers and shift the data bits into or out of the shift

There is a multitude of modes in which the timers and the

serial interface can work together.

Demodu–

lator 3

8–bit Counter 3

Capture 3

Compare 3/1

Compare 3/2

Modu–

lator 3

MUX

Control

Watchdog

Interval / Prescaler

Timer 1

Timer 3

Modu–

lator 2

4–bit Counter 2/1

Compare 2/1

MUX

MUX DCG

8–bit Counter 2/2

Compare 2/2

Control

Timer 2

MUX

8–bit Shift–Register

Receive–Buffer

Transmit–Buffer

Control

SSI

SCL

INT4

INT5

INT2

NRST

INT3

POUT

TOG2

TOG3

T1OUT

SUBCL

SYSCL

from clock module

T3O

T3I

13765

T2I

T2O

I/O bus

Figure 27. UTCM block diagram

T48C893 데이터시트(PDF) 29 Page - ATMEL Corporation

T48C893 데이터시트(HTML) 29 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

데이터시트 다운로드

링크 URL