T48C893 datasheet(52/82 Pages) ATMEL

52 / 82 page

T48C893

Rev. A4, 22-Jan-02

52 (82)

Timer 3 COmpare Register 1 (T3CO1) Byte Write

Address: ’B’hex – Subaddress: ’4’hex

High nibble

T3CO1

Second write cycle

Bit 7

Bit 6

Bit 5

Bit 4

Reset value: 1111b

Low nibble

First write cycle

Bit 3

Bit 2

Bit 1

Bit 0

Reset value: 1111b

Timer 3 COmpare Register 2 (T3CO2) Byte Write

Address: ’B’hex – Subaddress: ’5’hex

High nibble

T3CO2

Second write cycle

Bit 7

Bit 6

Bit 5

Bit 4

Reset value: 1111b

Low nibble

First write cycle

Bit 3

Bit 2

Bit 1

Bit 0

Reset value: 1111b

Timer 3 Capture register

The counter content can be read via the capture register. There are two ways to use the capture register. In modes 1

and 4, it is possible to read the current counter value directly out of the capture register. In the capture modes 2, 3, 5

and 12, a capture event like an edge at the Timer 3 input or a signal from Timer 2 stores the current counter value into

the capture register. This counter value can be read from the capture register.

Timer 3 CaPture Register (T3CP) Byte Read

Address: ’B’hex – Subaddress: ’4’hex

High nibble

T3CP

First read cycle

Bit 7

Bit 6

Bit 5

Bit 4

Reset value: xxxxb

Low nibble

Second read cycle

Bit 3

Bit 2

Bit 1

Bit 0

Reset value: xxxxb

T48C893 데이터시트(PDF) 52 Page - ATMEL Corporation

T48C893 데이터시트(HTML) 52 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

데이터시트 다운로드

링크 URL