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CDCM1802RGTT 데이터시트(PDF) 16 Page - Texas Instruments |
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CDCM1802RGTT 데이터시트(HTML) 16 Page - Texas Instruments |
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16 / 22 page ![]() CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION High-Z EN IN Y:/1 Undefined Low High-Z Y:/2 Undefined Low High-Z Y:/4 Undefined Low 1 µs Signal State After the Device is Enabled (IN = Low) High-Z EN IN Y:/1 Undefined Low High-Z Y:/2 Undefined Low High-Z Y:/4 Undefined Low 1 µs Signal State After the Device is Enabled (IN = High) Undivided State is Valid After the First Positive Transition of the Input Clock Figure 16. Waveforms |
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