| 전자부품 데이터시트 검색엔진 |
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ML9092-01TB 데이터시트(PDF) 47 Page - OKI electronic componets |
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ML9092-01TB 데이터시트(HTML) 47 Page - OKI electronic componets |
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47 / 66 page ![]() FEDL9092-01 OKI Semiconductor ML9092-01/02/03/04 47/66 (2) D6 (WLS) (Word Length Select) 1: 6-bit word length select 0: 8-bit word length select This bit selects the word length of data to be written to and read from the display RAM. If “1” is written to this bit, data will be read from and written to the display RAM in 6-bit units. If “0” is written to this bit, data will be read from and written to the display RAM in 8-bit units. This bit is reset to “0” if the RESET pin is pulled to a “L” level. (3) D5 (KT) (Key scan time) Key scan time select bit 1: 10 ms 0: 5 ms This bit selects the key scan cycle time. In the case of a 306 kHz oscillating frequency, writing a “1” to this bit sets the key scan cycle time at 10 ms (1/3072 divided frequency of the oscillating frequency), writing a “0” sets the key scan cycle time at 5 ms (1/1536 divided frequency of the oscillating frequency). This bit is set to “1” if the RESET pin is pulled to a “L” level. (4) D4 (SHL) (Common driver shift direction select bit) This bit selects the shift direction of common drivers. The relationship between this bit and shift directions are shown below. This bit is reset to “0” if the RESET pin is pulled to a “L” level. SHL Duty Shift direction 1/8 COM8 → COM1 1/9 COM9 → COM1 1 1/10 COM10 → COM1 1/8 COM1 → COM8 1/9 COM1 → COM9 0 1/10 COM1 → COM10 (5) D3 (BE) (Voltage doubler operation control bit ) This bit controls the operation of the voltage doubler. (Applies to ML9092-01/02.) 1: Voltage doubler enable 0: Voltage doubler disable This bit is reset to “0” if the RESET pin is pulled to a “L” level. (6) D2 (PE) (General-purpose port output enable/disable select bit) This bit selects high impedance output or output enable for the general-purpose port outputs A, B, C and D (C and D apply to ML9092-01 only; B applies to ML9092-01/04). 1: Output enable 0: High-impedance output (output disable) This bit is reset to “0” if the RESET pin is pulled to a “L” level. |
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