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AXP288D 데이터시트(PDF) 46 Page - Shenzhen X-Powers Technology Co ., Ltd

부품명 AXP288D
상세설명  PMIC Optimized For Multi-Core High-Performance System
PDF  110 Pages
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AXP288D 데이터시트(HTML) 46 Page - Shenzhen X-Powers Technology Co ., Ltd

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AXP288
PMIC Optimized For Multi-Core High-Performance System
AXP288 Datasheet V1.06
Copyright © 2014 X-Powers Limited. All Rights Reserved.
46
Table 9-21
REG 2CH
Description
R/W
Default
Bit 2
BC_status (BC Detection status)
1: Detecting, this bit is set when BC Detection start
0: Detection complete
RW
0
Input Source Select Setting
Table 9-22
VBUS_SEL
REG 00H[4]
IPSOUT from
1
1
VBUS
0
1
VSYS
×
0
VSYS
Table 9-23
REG 00H
Description
R/W
Default
Bit4
Indication VBUS can be used or not
R
0
9.2.3 VBUS current/voltage limitation
VBUS input power source has minimum hold voltage (VHOLD) setting and current limit setting. When the input
source voltage drops below its VHOLD setting, it is considered as not having sufficient power. IPS will limit the current
draw automatically so that the input source voltage is hold to this minimum level.
VBUS VHOLD is set as max of VBAT+0.15V or 30H[5:3] whereas VBUS current limit can be set through REG 35H[7:4].
VHOLD minimum voltage value can be set through the REG30H:
Table 9-24
5
VHOLD setting bit 2
000: 4.0V; 001: 4.1V; 010: 4.2V
011: 4.3V; 100: 4.4V; 101: 4.5V
110: 4.6V; 111: 4.7V
RW
1
4
VHOLD setting bit 1
RW
0
3
VHOLD setting bit 0
RW
0
VBUS current limit is set by REG35H[7:4]:
Table 9-25
7:4
VBUS current limit select when VBUS Current limited mode is enable
0000-100mA
0001-500mA
0010-900mA
0011-1500mA
0100-2000mA 0101-2500mA 0110-3000mA 0111-3500mA
1xxx-4000mA
RW
0001



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