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AXP288D 데이터시트(PDF) 20 Page - Shenzhen X-Powers Technology Co ., Ltd |
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AXP288D 데이터시트(HTML) 20 Page - Shenzhen X-Powers Technology Co ., Ltd |
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20 / 110 page ![]() AXP288 PMIC Optimized For Multi-Core High-Performance System AXP288 Datasheet V1.06 Copyright © 2014 X-Powers Limited. All Rights Reserved. 20 Addr TWSI Slave Address (7 bits) 0x34 fSCK Clock Operating Frequency 400 kHz VIL SCK/SDA Logic Low Voltage SDA is Open drain pin 0.3*VCC V VIH SCK/SDA Logic Low Voltage 0.7*VCC V tf Clock Data Fall Time 2.2Kohm Pull High 60 ns tr Clock Data Rise Time 2.2Kohm Pull High 100 ns VINT VINT Internal power supply for logic circuit 1.8 V Related IO: PWRON Rpull-up Internal resister to VINT 50 100 KΩ VIL Logic Low Voltage 0.5 V VIH Logic High Voltage 1.3 2.1 V Related IO: IRQ VIL Logic Low Voltage IRQ is open drain output pin, pull up to IO power (VIO) by 10KΩ 0.3 V VIH Logic High Voltage 0.7*VIO VIO V Related IO: RSMRST_B VIL Logic Low Voltage RSMRST_B is open drain output pin, pull up to IO power (VIO) by 10KΩ 0.3 V VIH Logic High Voltage 0.7*VIO VIO V Related IO: SUSPWRDACK VIL Logic Low Voltage Input pin 0.5 V VIH Logic High Voltage 1.3 V Ipull-down Pull down current 15 μA Related IO: DRAMPWROK VIL Logic Low Voltage DRAMPWROK is push-pull output pin, pull up to BUCK4 internal 0.3 V VIH Logic High Voltage 0.7* VBUCK4 VBUCK4 V Related IO: SLP_S0IX_B VIL Logic Low Voltage Input pin 0.5 V VIH Logic High Voltage 1.3 V Ipull-down Pull down current 15 μA Related IO: VCCAPWROK VIL Logic Low Voltage VCCAPWROK is push-pull output pin, pull up to BUCK4 internal 0.3 V VIH Logic High Voltage 0.7* VBUCK4 VBUCK4 V Related IO: COREPWROK |
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