DP83821 datasheet(27/86 Pages) NSC

27 / 86 page

3.0 Functional Description (Continued)

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Figure 3-16 Transmit State Diagram

3.13.3.2 Transmit Data Flow without Priority Queueing

In the DP83821 transmit architecture without Priority

Queueing, packet transmission involves the following

steps:

1. The device driver receives packets from an upper

layer.

2. An

available

DP83821

transmit

descriptor

allocated. The fragment information is copied from

the NOS specific data structure(s) to the next

DP83821 transmit descriptor.

3. The driver adds this descriptor to it’s internal list of

transmit descriptors awaiting transmission.

4. If the internal list was empty (this descriptor

represents the only outstanding transmit packet),

then the driver must set the TXDP register to the

address of this descriptor, else the driver will append

this descriptor to the end of the list.

5. The driver sets the TXEN bit in the CR register to

insure that the transmit state machine is active.

6. If idle, the transmit state machine reads the descriptor

into the TxDescriptorCache. If the OWN bit is not set,

the transmit state machine returns to idle to wait for

TXEN to be set again.

7. The state machine then moves through the fragment

described within the descriptor, filling the TxDataFifo

with data. The hardware handles all aspects of byte

alignment; no alignment is assumed. Fragments

may start and/or end on any byte address. The

transmit state machine uses the fragment pointer

and the SIZE field from the cmdsts field of the

current descriptor to keep the TxDataFifo full. It also

uses the MORE bit and the SIZE field from the

cmdsts

field of the current descriptor to know when

packet boundaries occur.

8. When

packet

has

completed

transmission

(successful or unsuccessful), the state machine

updates the cmdsts field of the current descriptor in

main memory (by bus-mastering a single 32-bit

word), relinquishing ownership, and indicating the

packet completion status. If more than one descriptor

txAdvance

link != NULL

txDescRead

TXDP <- txDescCache.link. Clear CTDD. Start a

burst transfer at address TXDP with a length

derived from TXCFG.

link == NULL

txIdle

set CTDD. set ISR:TXIDLE.

txDescRefr

txIdle

txDescRead

txFifoBlock

txDescWrite

txAdvance

txFragRead

CR:TXEN && CTDD

CR:TXEN && !CTDD

XferDone

XferDone && OWN

XferDone && !OWN

|| link != NULL

descCnt == 0 && !(cmdsts & MORE)

descCnt == 0 && (cmdsts & MORE)

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