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CS5541 데이터시트(PDF) 14 Page - Cirrus Logic

부품명 CS5541
상세설명  Low-power, High-Voltage, 24-Bit Delta-Sigma ADC
PDF  26 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5541 데이터시트(HTML) 14 Page - Cirrus Logic

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CS5541
14
DS500PP1
2.8 Command Register Quick Reference
Notes: 23. After entering a Power Save Mode, the user must wait a minimum of 2 system clocks before issuing a
convert command.
24. A Power Save Mode cannot be entered by selectively setting the D5 bit.
0xAX must be written to the command register before the Sleep Mode will be enabled.
Similarly, 0xBX must be written to the command register before the Standby Mode will be enabled.
25. If Four Cycle Settling is selected (D3 = ’1’), the part will perform a one-time calibration when continuous
calibration is chosen.
D7(MSB)
D6
D5D4D3
D2D1
D0
CB
CH
PS
U/B
FS1
FS0
C1
C0
BIT
NAME
VALUE
FUNCTION
D7
Command Bit, CB
0
1
Reserved
Logic 1 for executable commands
D6
Channel Select, CH
0
1
Activate AIN1 for conversion
Activate AIN2 for conversion
D5
Power Save, PS
Notes 23, 24
0
1
Data Mode
Power Save Mode (Standby or Sleep)
D4
Unipolar/Bipolar, U/B
0
1
Bipolar Conversion Mode
Unipolar Conversion Mode
D3-D2
Filter Select, FS1-FS0
Note 25
00
01
10
11
Single Cycle Settling, 50/60 Hz Reject
Single Cycle Settling, No 50/60 Hz Reject
Four Cycle Settling, 50/60 Hz Reject
Four Cycle Settling, No 50/60 Hz Reject
D1-D0
Conversion Calibration
Select, C1-C0
00
01
10
11
Calibrate prior to each point
Perform a one time calibration
Use default calibration coefficients for conversions
Use existing calibration coefficients for conversion



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