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MPC852T 데이터시트(PDF) 57 Page - Freescale Semiconductor, Inc |
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MPC852T 데이터시트(HTML) 57 Page - Freescale Semiconductor, Inc |
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57 / 80 page ![]() MPC852T Hardware Specifications, Rev. 3.1 Freescale Semiconductor 57 FEC Electrical Characteristics Figure 58 shows MII receive signal timing. Figure 58. MII Receive Signal Timing Diagram 15.2 MII Transmit Signal Timing (MII_TXD[3:0], MII_TX_EN, MII_TX_ER, MII_TX_CLK) The transmitter functions correctly up to a MII_TX_CLK maximum frequency of 25 MHz +1%. There is no minimum frequency requirement. In addition, the processor clock frequency must exceed the MII_TX_CLK frequency - 1%. Table 26 provides information about the MII transmit signal timing,. Figure 59 shows the MII transmit signal timing diagram. Table 26. MII Transmit Signal Timing Num Characteristic Min Max Unit M5 MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER invalid 5 — ns M6 MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER valid — 25 — M7 MII_TX_CLK pulse width high 35% 65% MII_TX_CLK period M8 MII_TX_CLK pulse width low 35% 65% MII_TX_CLK period M1 M2 MII_RX_CLK (input) MII_RXD[3:0] (inputs) MII_RX_DV MII_RX_ER M3 M4 |
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