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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AX58100LT 데이터시트(PDF) 1 Page - ASIX Electronics Corporation |
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AX58100LT 데이터시트(HTML) 1 Page - ASIX Electronics Corporation |
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1 / 71 page  1 AX58100 EtherCAT Slave Controller Released Date: 20/02/2019 TEL: +886-3-579-9500 FAX: +886-3-579-9558 http://www.asix.com.tw/ ASIX Electronics Corporation 4F, No.8, Hsin Ann Rd., Hsinchu Science Park, Hsinchu, Taiwan 30078 Features 2/3-port EtherCAT Slave Controller (ESC) with 2 Integrated Fast Ethernet PHYs Standard EtherCAT Slave Controller (ESC) 8 Fieldbus Memory Management Units (FMMUs) 8 Sync Managers 64-bit distributed clock 9K bytes RAM Integrated Fast Ethernet PHYs Compliant with IEEE 802.3/802.3u 100BASE-TX/100BASE-FX PHY loopback mode Supports twisted pair crossover detection and auto-correction (HP Auto-MDIX) Automatic polarity detection and correction 3rd Ethernet MII Port for Flexible EtherCAT Network Configurations Up to 32 Digital/General Purpose IOs Each IO is configurable individually and mapped to FMMU directly SPI Slave Interface Supports Mode 3 timing modes Supports MSB first transfer fashion Local Bus Interface Supports 8-bit or 16-bit data bus width Supports Asynchronous Local Bus Supports BHE with 16-bit data bus width Bridge Supports function and ESC registers mirror with selectable synchronous conditions 3-channel PWM Controller Adjustable frequency, phase align and BBM (Break Before Make) for all channels Adjustable duty cycle, phase shift, and signal polarity per channel Step & Direction Controller Adjustable step pulse width, polarity and the delay time for direction change Incremental and Hall Encoder Interface Support single ended ABZ with configurable counting constant, polarity and Multiple Z-signal functions support Supports clockwise/counter clockwise (CW/CCW) and direction-count (DIR/CLK) Inputs Supports Hall sensor Emergency Stop Input Configurable Watchdog for Outputs and Inputs Monitoring IRQ Event Output Interrupts for EtherCAT related events Interrupts for Application related events Interrupts for Watchdog Timeout SPI Master Interface Programmable SPI clock frequency up to 50MHz Supports 4 timing modes Supports MSB/LSB first transfer fashion Supports up to 8 SPI devices selection Supports up to 8 channels, each channel with 8 bytes read/write buffer Supports ADC Data Ready and DAC Data Loaded indication Supports periodic data acquisition Supports late sample for high latency device Supports external interrupt input Supports I2C Master Interface Integrates On-chip Power-on Reset Circuit 80-pin LQFP RoHS Compliant Package Operating Temperature Range: -40 to +105°C Target Applications Industrial Automation Motion/Motor Control Digital I/O Control Communication Module DAC/ADC Converters Control Sensors Data Acquisition Robotics Operator HMI Interfaces Document No: AX58100/V1.03/20/02/19 |
유사한 부품 번호 - AX58100LT |
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유사한 설명 - AX58100LT |
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