 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AX58100LT 데이터시트(PDF) 39 Page - ASIX Electronics Corporation |
|
|
|||||||||||||||||||||||||||||
AX58100LT 데이터시트(HTML) 39 Page - ASIX Electronics Corporation |
|
|
39 / 71 page  39 Copyright © 2018-2019 ASIX Electronics Corporation. All rights reserved. AX58100 EtherCAT Slave Controller Power-On-Reset (POR) Specification Below figures and table shows the two POR circuit spec during power ramp-up/down. Figure 4-1: Power On Reset (POR) Timing Diagram Symbol Description Conditions Min. Typ. Max. Units VCCK Power supply voltage to be detected - 1.0 1.2 1.32 V V rr VCCK rise relax voltage - - 0.72 0.9 V V fr VCCK fall release voltage - - 0.63 0.85 V Trst Reset time after POR trigger up VCCK slew rate = 1.0V / 1μs 1.8 2.5 4.8 μs Tdrop Drop time of VCCK to reset VCCK slew rate = 2.5V / 1μs 0.2 0.4 0.9 μs Table 4-3: Power On Reset (POR) Timing Table VCCK POR Output V rr V fr T drop T rst |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
